The annual Hot Chips conference is a place where industry and academia meet to discuss the latest developments in silicon chip technology. Head over to Anandtech and take a look at their coverage of the 2020 conference that’s on just…
There are 4 issues with Vivado 2020.1 that may affect your designs. A tactical patch has been created to avoid these issues.
This year, SkyWater announced a collaboration with Google to provide a service where you can design your own custom ASIC and get them for free (!!!). This week, Mohamed Shalan discussed the progress that’s being made for the individual steps…
Windows developers often need to use Unix-style commands and build software binary executables from source code.
This article shows you how to install MSys2 and how to use it for development.
SiFive have updated their RISC-V IP Portfolio with the release of the SiFive 20G1 range, offering FreeRTOS support, SiFive Shield security additions, lower power, better performance, smaller logic size and several other additions. Read the announcement here. Drew Barbier from…
A long time ago, a colleague described the challenge of getting the widest data eye possible and some of the subtle things that he had to consider. He described what happens as a differential pair turned a corner; one of the two traces would always have to take a longer path.
HDL languages like VHDL and Verilog are not like normal programming languages. This post describes how to read VHDL code and synthesise it in your head.