Xilinx put the new version of Vivado up on their website today, with improvement to simulation, timing closure, device support and IP. Read on for details and links.
Here is the slide deck used for the “Trends” presentation: And here is the slide deck used for the AXI presentation:
The International Symposium on FPGAs is scheduled for next week. This article provides links to the proceedings and the papers.
Vivado 2021.1 came out at the end of last month. What’s new besides the name-change? Read on…
The International Symposium for FPGA 2021 was held last week. If you couldn’t make it to the virtual conference, here’s where to find the papers.
Xilinx released their latest release of the Vivado and Vitis tools yesterday.
AMD will acquire Xilinx in an all-stock transaction valued at $35 billion.
Intel have released Quartus Prime Pro 20.3.
There is a new family of radiation-hardened FPGAs from a French company, called NanoXplore. These parts are being evaluated for space applications be CERN.
Microchip has announced the first FPGA to have a hard RISC-V IP CPU core; the PolarFire SoC. Read on to find out more. Update: There’s a dev board, too.