Xilinx put the new version of Vivado up on their website this week, with improvements to VHDL-2008 simulation and timing closure.
You can find it here:
https://www.xilinx.com/support/download.html
The following devices have been enabled both in standard and Enterprise Edition
- Artix UltraScale+: XCAU15P, XCAU10P
- Zynq UltraScale+ MPSoCs: XAZU1EG
More details about what’s new can be found here:
https://www.xilinx.com/products/design-tools/vivado/vivado-whats-new.html